cp3cn23 National Semiconductor Corporation, cp3cn23 Datasheet - Page 187
cp3cn23
Manufacturer Part Number
cp3cn23
Description
Cp3cn23 Reprogrammable Connectivity Processor With Dual Can Interfaces
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3CN23.pdf
(246 pages)
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26.0 Register Map
Table 72 is a detailed memory map showing the specific
memory address of the memory, I/O ports, and registers.
The table shows the starting address, the size, and a brief
description of each memory block and register. For detailed
information on using these memory locations, see the appli-
cable sections in the data sheet.
All addresses not listed in the table are reserved and must
not be read or written. An attempt to access an unlisted ad-
dress will have unpredictable results.
Each byte-wide register occupies a single address and can
be accessed only in a byte-wide transaction. Each word-
wide register occupies two consecutive memory addresses
and can be accessed only in a word-wide transaction. Both
CMB0_CNSTAT
CMB0_TSTP
CMB0_DATA3
CMB0_DATA2
CMB0_DATA1
CMB0_DATA0
CMB0_ID0
CMB0_ID1
CMB1
CMB2
CMB3
CMB4
CMB5
CMB6
CMB7
CMB8
CMB9
Register Name
Table 72 Detailed Device Mapping
CAN0 Module Message Buffers
8-word
8-word
8-word
8-word
8-word
8-word
8-word
8-word
8-word
Word
Word
Word
Word
Word
Word
Word
Word
Size
0E F010h–
0E F020h–
0E F030h–
0E F040h–
0E F050h–
0E F060h–
0E F070h–
0E F080h–
0E F090h–
0E F00Ch
0E F00Ah
0E F00Eh
0E F01Fh
0E F02Fh
0E F03Fh
0E F04Fh
0E F05Fh
0E F06Fh
0E F07Fh
0E F08Fh
0E F09Fh
0E F000h
0E F002h
0E F004h
0E F006h
0E F008h
Address
187
the byte-wide and word-wide registers reside at word
boundaries (even addresses). Therefore, each byte-wide
register uses only the lowest eight bits of the internal data
bus.
Most device registers are read/write registers. However,
some registers are read-only or write-only, as indicated in
the table. An attempt to read a write-only register or to write
a read-only register will have unpredictable results.
When software writes to a register in which one or more bits
are reserved, it must write a zero to each reserved bit unless
indicated otherwise in the description of the register. Read-
ing a reserved bit returns an undefined value.
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Type
Value After
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
XXXXh
Reset
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Same register layout
as CMB0.
Comments
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