m52s64164a Elite Semiconductor Memory Technology Inc., m52s64164a Datasheet - Page 9
m52s64164a
Manufacturer Part Number
m52s64164a
Description
1m X 16 Bit X 4 Banks Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
1.M52S64164A.pdf
(47 pages)
- Current page: 9 of 47
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ESMT
BA1 BA0 A11 A10
EXTENDED MODE REGISTER SET (EMRS)
The extended mode register stores for selecting PASR;TCSR;DS. The extended mode register set must be done before any active
command after the power up sequence. The extended mode register is written by asserting low on CS,RAS,CAS,WE and high on
BA1,low on BA0(The SDRAM should be in all bank precharge with CKE already high prior to writing into the extended more
register). The state of address pins
A0~An in the same cycle as CS,RAS,CAS,WE going low is written in the extended mode register. Refer to the table for specific
codes.
The extended mode register can be changed by using the same command and clock cycle requirements during operations as long
as all banks are in the idle state. The default value extended mode register is defined as half driving strength and all banks
refreshed.
Elite Semiconductor Memory Technology Inc.
1
0
0
0
A9
0
A8 A7
0
0
A6
DS
A5 A4
TCSR
A3
A2 A1 A0
PASR
DS
PASR
Address bus
Extended Mode Register Set
A2-A0
A6-A5
000
001
010
100
101
011
111
00
01
10
11
Publication Date: Sep. 2008
Revision: 1.4
M52S64164A
2 Bank (BankA& BankB) or
1/2 Bank (BankA) or
1 Bank (BankA) or
A11=BA0=BA1=0
Driver Strength
Remark R : Reserved
(BA0=BA1=0)
Full Strength
1/2 Strength
1/4 Strength
(BA1=0)
4Bank
WT=0
R
R
R
R
9/47
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