m52s64164a Elite Semiconductor Memory Technology Inc., m52s64164a Datasheet - Page 21

• Manufacturer Part Number: m52s64164a
• Description: 1m X 16 Bit X 4 Banks Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
*Note : 1. To prevent bus contention, there should be at least one gap between data in and data out.
5. Write Interrupted by Precharge & DQM
*Note : 1. To prevent bus contention, DQM should be issued which makes at least one gap between data in and data out.
Elite Semiconductor Memory Technology Inc.
2. To inhibit invalid write, DQM should be issued.
3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge interrupt
( b ) C L = 3 , B L = 4
but only another bank precharge of four banks operation.
i i i ) C M D
i v ) C M D
i i ) C M D
v ) C M D
i ) C M D
C M D
C L K
D Q M
D Q
D Q M
D Q M
D Q M
D Q M
C L K
D Q M
D Q
D Q
D Q
D Q
D Q
W R
D 0
D 1
R D
R D
R D
R D
R D
D 2
W R
D 0
D 3
M a s k e d b y D Q M
* N o t e 2
* N o t e 3
W R
D 1
D 0
H i - Z
W R
Q0
D 2
D 1
D 0
* N o t e 1
H i - Z
W R
D 0
D 3
D 2
D 1
W R
D 0
D 3
D 2
D 1
D 1
D 3
D 2
D 3
D 2
D 3
Publication Date: Sep. 2008
Revision: 1.4
M52S64164A
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