m52s64164a Elite Semiconductor Memory Technology Inc., m52s64164a Datasheet - Page 33

no-image

m52s64164a

Manufacturer Part Number
m52s64164a
Description
1m X 16 Bit X 4 Banks Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
ESMT
Page Read & Write Cycle at Same Bank @ Burst Length = 4
Note : 1. To Write data before burst read ends. DQM should be asserted three cycle prior to write command to avoid
Elite Semiconductor Memory Technology Inc.
2. Row precharge will interrupt writing. Last data input , t
3. DQM should mask invalid input data on precharge command cycle when asserting precharge before
bus contention.
end of burst. Input data after Row precharge cycle will be masked internally.
RDL
before row precharge , will be written.
Publication Date: Sep. 2008
Revision: 1.4
M52S64164A
33/47

Related parts for m52s64164a