gal16v8z-15qs Lattice Semiconductor Corp., gal16v8z-15qs Datasheet - Page 15

• Manufacturer Part Number: gal16v8z-15qs
• Description: Gal Zero Power E2cmos Pld
• Manufacturer: Lattice Semiconductor Corp.

3-state levels are measured 0.5V from steady-state active
level.
Output Load Conditions (see figure)
f
Switching Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
max Descriptions
Test Condition
A
B
C
Note: fmax with external feedback is calculated from
measured tsu and tco.
Note: fmax with no feedback may be less than 1/(twh
+ twl). This is to allow for a clock duty cycle of other
than 50%.
f
Active High
Active Low
Active High
Active Low
max with External Feedback 1/(
LOGIC
ARRAY
LOGIC
ARRAY
t
su +
f
t
max with No Feedback
su
t
h
300
300
300
R1
REGISTER
REGISTER
CLK
CLK
390
390
390
390
390
R2
3ns 10% – 90%
t
GND to 3.0V
t
See Figure
co
su+
1.5V
1.5V
t
co)
50pF
50pF
50pF
5pF
5pF
CL
15
FROM OUTPUT (O/Q)
UNDER TEST
Note: tcf is a calculated value, derived by subtracting
tsu from the period of fmax w/internal feedback (tcf
= 1/fmax - tsu). The value of tcf is used primarily
when calculating the delay from clocking a register
to a combinatorial output (through registered feed-
back), as shown above. For example, the timing
from clock to a combinatorial output is equal to tcf
+ tpd.
Specifications GAL16V8Z
*C
f
max with Internal Feedback 1/(
L
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
LOGIC
ARRAY
R
2
t
cf
+5V
t
pd
REGISTER
GAL16V8ZD
CLK
R
1
C *
t
su+
L
TEST POINT
t
cf)