net2890 ETC-unknow, net2890 Datasheet - Page 15

• Manufacturer Part Number: net2890
• Description: Interface Controller
• Manufacturer: ETC-unknow

Specification
IOW#
DRQ
DACK#
EOT#
IRQ#
USBOE#
DEVCFG#
SUSP#
LCLK
____________________________________________________________________________________
18
19
20
21
26
27
28
33
16
335 Pioneer Way, Mountain View, California 94041
I/O, 12mA,
S, TS, PU
O, 12mA,
O, 12mA,
O, 12mA,
O, 12mA,
O, 12mA,
TP, PD
TP, PD
TP, PD
TEL [phone] FAX [phone]
I, PU
I, PU
I, PU
OD
TP
NetChip Technology, Inc., 1999
Rev 2.0, Draft 9, July 16, 1999
http://www.netchip.com
I/O Write. The I/O write strobe is asserted along with CS# and A[4:0]
when a device on the local bus writes to an internal register or FIFO. It
also allows a FIFO to be written during DMA transfers when DACK#
is asserted.
DMA Request. This signal indicates to an external DMA controller
that a byte should be transferred to/from the FIFO. During a transfer,
DRQ remains asserted until the DACK# input goes active. This output
floats when the device is suspended by the USB Host.
DMA Acknowledge. This signal from an external DMA controller is
used to transfer data to/from the FIFO in response to DRQ. IOR# and
IOW# determine the direction of the DMA transfer.
End of Transfer. This signal from an external DMA controller is used
to terminate a DMA transfer. If it is asserted during a DMA cycle, the
current byte will be transferred, but no additional bytes will be
requested. EOT# can be programmed to cause a USB interrupt.
Interrupt Request Output. The interrupt request output is used to
interrupt a processor on the local bus. There are several sources of this
interrupt which are described in the Register Description Section.
USB Port Output Enable. When RESET# is not asserted, this is an
active low output that is asserted when the NET2890 is driving the
USB port data lines. It is intended for debugging purposes only. This
signal is not driven while the device is suspended, but will be pulled
high by the internal pull-up resistor. When RESET# is asserted, this
pin is an input. Driving a LOW level during RESET# holds the
NET2890 in a low-power mode by disabling the internal oscillator.
Device Configured. This active low output is true when the NET2890
has been configured by the USB host. This bit is initialized to inactive
(high) during reset and is controlled by the local CPU through the
MAINCTL configuration register. This signal is not driven while the
device is suspended, but will be pulled low by the internal pull-down
resistor. If DEVCFG# is not needed locally, this signal can be used as
a general output pin.
Device Suspended. This active low output is true when the NET2890
has been suspended by the USB host. This signal is not driven while
the device is suspended, but will be pulled low by the internal pull-
down resistor.
Local Clock. This pin is a buffered clock output from either the
internal 48 MHz oscillator or the derived USB clock, depending on the
state of the “Local Clock Output” bits in the LOCALCTL
configuration register. This signal is not driven while the device is
suspended, but will be pulled low by the internal pull-down resistor.
When the internal oscillator is started, LCLK is prevented from being
driven for 2 msec.
NET2890 USB Interface Controller
15