wm8918 Wolfson Microelectronics plc, wm8918 Datasheet - Page 85

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wm8918

Manufacturer Part Number
wm8918
Description
Ultra Low Power Dac For Portable Audio Applications
Manufacturer
Wolfson Microelectronics plc
Datasheet

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In DSP mode, the left channel MSB is available on either the 1
edge of BCLK (selectable by AIF_LRCLK_INV) following a rising edge of LRCLK. Right channel data
immediately follows left channel data. Depending on word length, BCLK frequency and sample rate,
there may be unused BCLK cycles between the LSB of the right channel data and the next sample.
In device master mode, the LRCLK output will resemble the frame pulse shown in Figure 48 and
Figure 49. In device slave mode, Figure 50 and Figure 51, it is possible to use any length of frame
pulse less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK
period before the rising edge of the next frame pulse.
Figure 48 DSP Mode Audio Interface (mode A, AIF_LRCLK_INV=0, Master)
Figure 49 DSP Mode Audio Interface (mode B, AIF_LRCLK_INV=1, Master)
Figure 50 DSP Mode Audio Interface (mode A, AIF_LRCLK_INV=0, Slave)
st
(mode B) or 2
PD, Rev 4.0, September 2010
nd
(mode A) rising
WM8918
85

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