wm8918 Wolfson Microelectronics plc, wm8918 Datasheet - Page 64

• Manufacturer Part Number: wm8918
• Description: Ultra Low Power Dac For Portable Audio Applications
• Manufacturer: Wolfson Microelectronics plc

WM8918
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OUTPUT SIGNAL PATHS ENABLE
The output PGAs for each analogue output pin can be enabled and disabled using the register bits
described in Table 38.
Note that the Headphone Outputs and Line Outputs are also controlled by fields located within
Register R90 and R94, which provide suppression of pops & clicks when enabling and disabling
these signal paths. These registers are described in the following “Headphone / Line Output Signal
Paths Enable” section.
Under recommended usage conditions, all the control bits associated with enabling the Headphone
Outputs and the Line Outputs will be configured by scheduling the default Start-Up and Shutdown
sequences as described in the “Control Write Sequencer” section. In these cases, the user does not
need to set the register fields in R14, R15, R90 and R94 directly.
Table 38 Output Signal Paths Enable
To enable the output PGAs and multiplexers, the reference voltage VMID and the bias current must
also be enabled. See “Reference Voltages and Master Bias” for details of the associated controls
VMID_RES and BIAS_ENA.
HEADPHONE / LINE OUTPUT SIGNAL PATHS ENABLE
The output paths can be actively discharged to AGND through internal resistors if desired. This is
desirable at start-up in order to achieve a known output stage condition prior to enabling the VMID
reference voltage. This is also desirable in shutdown to prevent the external connections from being
affected by the internal circuits. The ground-referenced Headphone outputs and Line outputs are
shorted to AGND by default; the short circuit is removed on each of these paths by setting the
applicable
LINEOUTR_RMV_SHORT.
The ground-referenced Headphone output and Line output drivers are designed to suppress pops
and clicks when enabled or disabled. However, it is necessary to control the drivers in accordance
with a defined sequence in start-up and shutdown to achieve the pop suppression. It is also
necessary to schedule the DC Servo offset correction at the appropriate point in the sequence (see
“DC Servo”). Table 39 and Table 40 describe the recommended sequences for enabling and
disabling these output drivers.
R14 (0Eh)
Power
Management 2
R15 (0Fh)
Power
Management 3
REGISTER
ADDRESS
fields
BIT
1
0
1
0
HPL_RMV_SHORT,
LINEOUTL_PGA_
LINEOUTR_PGA
HPR_PGA_ENA
HPL_PGA_ENA
LABEL
_ENA
ENA
HPR_RMV_SHORT,
DEFAULT
0
0
0
0
Left Headphone Output Enable
0 = Disabled
1 = Enabled
Right Headphone Output Enable
0 = Disabled
1 = Enabled
Left Line Output Enable
0 = Disabled
1 = Enabled
Right Line Output Enable
0 = Disabled
1 = Enabled
LINEOUTL_RMV_SHORT
PD, Rev 4.0, September 2010
DESCRIPTION
Production Data
64
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