73m2910l ETC-unknow, 73m2910l Datasheet - Page 29

• Manufacturer Part Number: 73m2910l
• Description: Microcontroller
• Manufacturer: ETC-unknow

PARAMETER
Maximum Power Supply
power-down mode
Pin Capacitance
Oscillator Frequency
Oscillator Period
ALE Pulse Width
Address Valid To ALE Low
Address Valid ALE Low
ALE Low to PSEN Low
PSEN Pulse Width Low
PSEN Low to Valid Inst In
Address to Valid Inst In
Input Instr Hold- PSEN High
PSEN Instr Float- PSEN High
PSEN Low to Address HighZ
DC CHARACTERISTICS
AC TIMING
The 73M2910L timing is very similar to the 8032 except in AD(7:0), the multiplexed address data port known
as port 0 in the 8032. Its timing has been altered somewhat to allow more address setup time for peripheral
program ROM and memory mapped peripherals. This is important for operation above 22 MHz. The 8032 has
a “dead” cycle of one oscillator period between the time PSEN goes high, indicating that the instruction ROM
will release the AD(7:0) bus, to the time the processor will assert address on the AD(7:0) bus. This dead time
of one whole oscillator cycle has been shortened to approximately 15 ns after the PSEN (or RD) signal is
sensed to be high.
The timing specification for TPXIZ and TRHDZ of a maximum of 20 ns can be violated at the expense of
increased operating current. The 73M2910L will begin asserting the AD(7:0) bus approximately 20 ns after
PSEN or RD go high. This should be ample time for the control signals in the peripheral device to turn off their
pad drivers. If the peripheral device does not release the bus promptly, there will be a short time where there
is contention on the AD(7:0) bus between the processor and peripheral. This should not prevent proper
operation, but it will increase operating current slightly.
EXTERNAL PROGRAM MEMORY READ TIMING
TPLPH
IDD3
TAVLL
TLLAX
TLHLL
TLLPL
TAVIV
FOSC
TOSC
TPLIV
CIO
CONDITION
@1 MHz
TPXIX
TPXIZ
TPLAZ
29
TOSC - 10
TOSC - 10
2TOSC - 10
TOSC
3TOSC -
22.7
MIN
20
0
NOM
Microcontroller
0
3TOSC - 50
6TOSC - 32
MAX
20+
10
10
44
10
UNIT
MHz
µA
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns