73m2910l ETC-unknow, 73m2910l Datasheet - Page 21

• Manufacturer Part Number: 73m2910l
• Description: Microcontroller
• Manufacturer: ETC-unknow

RX DATA REGISTER (RXD) SFR ADDRESS 0C6h
Byte Addressable
Read Only Register
Reset State XXh
BITS 7-0 Received Data Byte
Bit 7 through bit 0 is the received data byte (LSB is received first) with all inserted 0s removed. A data ready
interrupt will be generated when a new data byte is received. Reading this register will clear the data ready
interrupt.
TX DATA REGISTER (TXD) SFR ADDRESS 0C7h
Byte Addressable
Write Only Register
Reset State XXh
BITS 7-0 Transmit Data Byte
Bit 7 through bit 0 will be transmitted at the next byte boundary (LSB first) if the HDLC TX control send data
bit is set. The HDLC will insert all necessary 0s. A TX ready interrupt will be generated when a new data byte
can be loaded into the TX Data Register. Writing this register will clear the TX ready interrupt.
DAT7
DAT7
BIT 7
BIT 7
RX
TX
DAT6
DAT6
BIT 6
BIT 6
RX
TX
DAT5
DAT5
BIT 5
BIT 5
RX
TX
DAT4
DAT4
BIT 4
BIT 4
RX
TX
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DAT3
DAT3
BIT 3
BIT 3
RX
TX
DAT2
DAT2
BIT 2
BIT 2
RX
TX
Microcontroller
DAT1
DAT1
BIT 1
BIT 1
RX
TX
DAT0
DAT0
BIT 0
BIT 0
RX
TX