sc16c752-04 NXP Semiconductors, sc16c752-04 Datasheet - Page 29

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sc16c752-04

Manufacturer Part Number
sc16c752-04
Description
Sc16c752 Dual Uart With 64-byte Fifo
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
9397 750 11635
Product data
7.14 FIFO ready register
The FIFO ready register provides real-time status of the transmit and receive FIFOs
of both channels.
Table 22:
The FIFO Rdy register is a read-only register that can be accessed when any of the
two UARTs is selected CSA or CSB = 0, MCR[2] (FIFO Rdy Enable) is a logic 1, and
loop-back is disabled. The address is 111.
Bit
7-6
5
4
3-2
1
0
Symbol
FIFO Rdy[7:6]
FIFO Rdy[5]
FIFO Rdy[4]
FIFO Rdy[3:2]
FIFO Rdy[1]
FIFO Rdy[0]
FIFO Ready Register bits description
Rev. 04 — 20 June 2003
Description
Unused; always 0.
RX FIFO B status. Related to DMA.
RX FIFO A status. Related to DMA.
Unused; always 0.
TX FIFO B status. Related to DMA.
TX FIFO A status. Related to DMA.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Dual UART with 64-byte FIFO
SC16C752
29 of 47

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