ak4368 AKM Semiconductor, Inc., ak4368 Datasheet - Page 45

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ak4368

Manufacturer Part Number
ak4368
Description
Dac With Built-in Pll & Hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
4) LIN/RIN/MIN → Lineout
(1) PDN pin should be set to “H” at least 150ns after power is supplied. MCKI, BICK and LRCK can be stopped when
(2) PMVCM bit should be changed to “1” after PDN pin goes “H”.
(3) LINL, MINL, RINR and MINR bits should be changed to “1” after PMVCM bit is changed to “1”.
(4) When LINL, MINL, RINR or MINR bit is changed to “1”, LIN, RIN or MIN pin is biased to 0.475 x AVDD.
(5) When the 3D function is used, 3D1-0 bits should be changed to “01”, “10” or “11” after LINL, MINL, RINR and
(6) When the 3D function is not used, MUTEN and PMLO bits should be changed to “1” at least 2ms (in case external
(7) When the PMLO bit is changed, pop noise is output from LOUT/ROUT pins.
MS0529-E-00
DAC is not used.
MINR bits are changed to “1”.(refer to Table 25)
capacitance at VCOM pin is 2.2µF) after LINL, MINL, RINR and MINR bits are changed to “1”. When the 3D
function is used, MUTEN and PMLO bits should be changed to “1” at least 50ms after 3D1-0 bits are changed to
“01”, “10” or “11”.
3D1-0 bits
(when 3D is used)
MUTEN bit
PMLO bit
Power Supply
PDN pin
PMVCM bit
LINL, RINR, MINL, MINR bits
LIN/RIN/MIN pins
LMUTE,
ATTS3-0 bits
LOUT/ROUT pins
Figure 37. Power-up/down sequence of LIN/RIN/MIN and LOUT/ROUT
“00” (3D OFF)
10H(MUTE)
(1) >150ns
(Hi-Z)
(Hi-Z)
(2) >0s
(4)
(3) >0s
(5) >0s
(6) >2ms(at 3D OFF), >50ms(at 3D ON)
(7)
“01”, “10” or “11” (3D ON)
0FH(0dB)
- 45 -
(7)
Don’t care
(Hi-Z)
(Hi-Z)
“00”
(6) >2ms or >50ms
(7)
“01”, “10” or “11”
[AK4368EG]
2006/07

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