ak4368 AKM Semiconductor, Inc., ak4368 Datasheet - Page 34

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ak4368

Manufacturer Part Number
ak4368
Description
Dac With Built-in Pll & Hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
1) DAC → HP-Amp
(1) PDN pin should be set to “H” at least 150ns after power is supplied.
(2) PMVCM and PMDAC bits should be changed to “1” after PDN pin goes “H”.
(3) External clocks (MCKI, BICK, LRCK) are needed to operate the DAC. When the PMDAC bit = “0”, these clocks
(4) DACHL and DACHR bits should be changed to “1” after the PMDAC bit is changed to “1”.
(5) When the 3D function is used, 3D1-0 bits should be changed to “10” after DACHL and DACHR bits are changed to
(6) When the 3D function is not used, PMHPL, PMHPR and MUTEN bits should be changed to “1” at least 2ms (in case
(7) Rise time of the headphone-amp is determined by an external capacitor (C) of the MUTET pin. The rise time up to
(8) Fall time of the headphone-amp is determined by an external capacitor (C) of the MUTET pin. The fall time down to
(9) Analog output corresponding to the digital input has a group delay (GD) of 22/fs(=499µs@fs=44.1kHz).
(10) The ATS bit sets transition time of digital attenuator. Default value is 1061/fs(=24ms@fs=44.1kHz).
(11) The power supply should be switched off after the headphone-amp is powered down (HPL/R pins become “L”).
MS0529-E-00
Power-Up/Down Sequence (EXT mode)
Clock Input
PMDAC bit
DAC Internal
SDTI pin
PMHPL,
PMHPR bits
MUTEN bit
ATTL7-0
ATTR7-0 bits
HPL/R pin
can be stopped. The headphone-amp can operate without these clocks.
“1”.
external capacitance at VCOM pin is 2.2µF) after the DACHL and DACHR bits are changed to “1”. When the 3D
function is used, PMHPL, PMHPR and MUTEN bits should be changed to “1” at least 50ms after 3D1-0 bits are
changed to “10”.
VCOM/2 is t
VCOM/2 is t
PMHPL and PMHPR bits should be changed to “0” after HPL and HPR pins go to HVSS. After that, the
DACL/DACR bits should be changed to “0” and 3D1-0 bits = “00”.
Power Supply
PDN pin
PMVCM bit
DACHL,
DACHR bits
3D1-0 bits
(when 3D is used)
State
r
f
Figure 26. Power-up/down sequence of DAC and HP-amp (Don’t care: except Hi-Z)
= 70k x C(typ). When C=1µF, t
= 60k x C(typ). When C=1µF, t
“00”(3D OFF)
Don’t care
PD
(1)
>150ns
00H(MUTE)
(2) >0
(3)
(7)
(4) >0
(5) >0
(6) >2ms(at 3D OFF), >50ms(at 3D ON)
(9) GD (10) 1061/fs
FFH(0dB)
Normal Operation
“10”(3D ON )
r
f
= 70ms(typ).
= 60ms(typ).
(9) (10)
- 34 -
(8)
00H(MUTE)
Don’t care
Don’t care
PD
“00”
(7)
(4) >0
(5) >0
(6) >2ms, or >50ms
Normal Operation
(9) (10)
FFH(0dB)
“10”
(9) (10)
00H(MUTE)
(8)
Don’t care
[AK4368EG]
“00”
PD
2006/07
(11)

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