ald523d Advanced Linear Devices Inc (ALD), ald523d Datasheet - Page 5

• Manufacturer Part Number: ald523d
• Description: Multifunction 7-digit Serial Input Display Module Controller
• Manufacturer: Advanced Linear Devices Inc (ALD)

ALD523 SETUP AND CALIBRATION SOFTWARE
In the stand-alone mode, ALD523D operates in
conjunction with a 1K EEPROM chip to preserve the
setup and arithmetic (calibration) parameters of the
ALD523D. These parameters are utilized to fully control
the CDM and measurement functions. The parameters are
preset by the user through the ALD523D Setup and
Calibration PC software known as DVM523.EXE, and
later uploaded to the EEPROM via a standard parallel
printer port. See the ALD523D Setup and Calibration
User Guide (DVM523) for more details.
SELECTING AND CONFIGURING MODES OF
OPERATIONS
The three ALD523D modes of operations, namely mode-
A, mode-B, and mode-C are configured in the .CDS file
(see Table 1 of the ALD523D Setup and Calibration
Software User Guide), and are selected by means of user
selection of SEL0 and SEL1 control inputs of the
ALD523D. Each display set “DGSx” has an associated
mode parameter “Mx” which specifies the mode of
operation. Hence, “DGS1”, “DGS2”, and “DGS3” have 3
associated mode specifying parameters “M1”, “M2”, and
“M3”, respectively. Each “Mx” parameter can be preset to
either “Mode-A”, “Mode-B”, or “Mode-C”.
I. CALIBRATED REFERENCE MODE (MODE-A)
Mode-A can be selected by setting the nibble “M1”
parameter, or “M2” or “M3” of the byte “M2-M3”
parameter to an “A” (HEX) in the .CDS file. “M1”, “M2”,
and “M3” are the mode selection parameters associated
with “DGS1”, “DGS2”, and “DGS3” display sets,
respectively.
In mode-A or mode-B operation, the bit masking
“SMSK1” to “SMSK4” and the polarity bit masking
“SMSK5” to “SMSK8” parameters are not utilized.
However, this mode transmits a 24-bit serial word on pin
26, DATOUT. This 24-bit serial word consists of 23-bit
binary data with MSB as the first bit, LSB the 23
followed by a sign bit as the last bit. The sign bit is a
logical “1” as a positive sign, and logical “0” as a negative
sign.
II. RATIOMETRIC MODE (MODE-B)
Mode-B can be selected by setting the nibble “M1”
parameter, or “M2” or “M3” of the byte “M2-M3”
parameter to an “B” (HEX) in the .CDS file.
ALD523D
© © © © 2001 Advanced Linear Devices, Inc., 415 Tasman Drive, Sunnyvale, California 94089-1706, Tel: [phone], Fax: [phone]
12/01
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rd
bit,
When the ALD523D is powered up the first time or after
power-on-reset, a zero correction is automatically set by
zeroing out the reading. This automatic zero correction
feature can be manually overwritten by the Z switch (see
Table 5) at any time. The overwrite feature is embedded
to eliminate the long wait time at long integration time,
and add flexibility to perform zero correction at any time.
However, the faster the integration time set, the less the
wait time is needed to perform the automatic zero
correction (i.e. it takes typically from about 1 to 14
seconds to automatically zero out a reading for integration
time of 16.66 ms to 300 ms, respectively).
III. DISPLAY ONLY MODE (MODE-C)
Mode-C can be selected by setting the nibble “M1”
parameter, or “M2” or “M3” of the byte “M2-M3”
parameter to an “C” (HEX) in the .CDS file. In mode-C
operation, switches “S1”, “S2”, and “S3” are internally
disabled.
In mode-C operation, the ALD523D receives a maximum
serial word length of 32 bits in accordance to 32 serial
clock pulses, and processes a maximum of 21-bit serial
word plus 1 sign bit within this 32-bit serial word. This
21-bit serial word can be any 21-bit consecutive serial data
stream segment within the 32-bit serial clocks, as selected
by programming of the bit masks “SMSK1” through
“SMSK4”.
governed by a DVCS signal. A transition of DVCS from
high to low state signals the start of the serial input data bit
stream clocking. A transition of DVCS from low to high
state stops the serial input data bit stream clocking.
After an external instrument or processor sets the DVCS to
logic 0, the DATIN terminal of the ALD523D is ready for
serial input data stream. The ALD523D reads the first bit
of the serial input data stream on DATIN and sends a
serial clock pulse on the SCLK as an acknowledge signal
to the external instrument or processor. Then the
ALD523D reads the second bit of the serial input data
stream and sends out a second SCLK clock pulse. This
serial data reading and clocking process continues until
DVCS is set to high state or until a maximum of 32 serial
input data bits have been read. The serial clock SCLK
consists of a low to high transition followed by a high to
low transition.
The maximum converted decimal number from this 21-bit
binary data plus sign bit is ± 9999999, when a suitable
multiplier and an appropriate conversion factor are used.
The sign bit is defined as logic “0” as a positive sign, and
logic “1” as a negative sign. Alternatively, the sign bit
The length of the received serial word is
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