tc59lm818dmbi TOSHIBA Semiconductor CORPORATION, tc59lm818dmbi Datasheet - Page 9

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tc59lm818dmbi

Manufacturer Part Number
tc59lm818dmbi
Description
288mbits Network Fcram2 I-version ? 4,194,304-words ? 4 Banks ? 18-bits
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
AC CHARACTERISTICS AND OPERATING CONDITIONS
t
t
t
t
t
t
t
I
I
I
I
I
I
I
I
I
I
I
I
SYMBOL
LZ
HZ
QPDH
PDEX
T
REFI
PAUSE
RC
RCD
RAS
RBD
RWD
WRD
RSC
PD
PDA
PDV
REFC
LOCK
Data-out Low Impedance Time from CLK
Data-out High Impedance Time from CLK
Last output to PD High Hold Time
Power Down Exit Time
Input Transition Time
Auto-Refresh Average Interval
Pause Time after Power-up
Random Read/Write Cycle
Time
(applicable to same bank)
RDA/WRA to LAL Command Input Delay
(applicable to same bank)
LAL to RDA/WRA Command
Input Delay
(applicable to same bank)
Random Bank Access Delay
(applicable to other bank)
LAL following RDA to WRA
Delay
(applicable to other bank)
LAL following WRA to RDA Delay
(applicable to other bank)
Mode Register Set Cycle Time
Power down mode valid from
REF command
Auto-Refresh Cycle Time
DLL Lock-on Time
(applicable to RDA command)
PD Low to Inactive State of Input Buffer
PD High to Active State of Input Buffer
PARAMETER
C
C
C
C
C
C
B
B
C
C
C
C
C
C
C
C
C
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
= 2
= 4
= 4
= 5
= 6
= 4
= 5
= 6
= 4
= 5
= 6
= 4
= 5
= 6
= 4
= 5
= 6
−0.65
MIN
200
200
0.7
0.1
0.4
19
23
25
19
23
25
0
5
6
7
1
4
5
6
2
2
3
1
7
7
7
1
-37
(Notes: 1, 2) (continued)
MAX
0.65
1.95
1
1
2
TC59LM818DMBI-37
2005-03-07 9/55
UNIT
cycle
ns
µs
NOTES
Rev 1.2
3,6,8
3,7,8
3
5

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