lf3321qc9 LOGIC Devices Incorporated, lf3321qc9 Datasheet - Page 19

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lf3321qc9

Manufacturer Part Number
lf3321qc9
Description
Horizontal Digital Image Filter
Manufacturer
LOGIC Devices Incorporated
Datasheet
DEVICES INCORPORATED
Double Wide
Data/Coefficient
Mode
LOGIC Devices Incorporated
Operating Modes
The LF3321 is capable of supporting 24-bit data and 12-bit coefficients or 12-bit data and 24-bit coefficients.
When configured for this mode of operation, the Filter B output is scaled by 2-12 before adding it to the Filter
A output. This mode of operation is only valid in single filter mode.
To configure the LF3321 for this mode, bit 3 of Configuration Register 5 must be set to 1; this will account
for the scaling function (Table 7). For 24-bit data, DIN11-0 becomes the MSB (Filter A) and RIN11-0
becomes the LSB (Filter B), bit 2 of Configuration Register 5 must be set to 0. To insure correct results,
the coefficient sets must be aligned appropriately; that is to say, the coefficient set used for the MSB must
be the same for the LSB. For 24-bit coefficients, the coefficient banks for Filter A will correspond to the
coefficient MSB and the coefficient banks for Filter B will correspond to the coefficient LSB; therefore, bit
2 must be set to 1.
Once again, to insure correct results, the coefficient sets must be aligned appropriately; that is to say, the
MSB coefficients must correspond to their LSB coefficients. The output data will appear at DOUT15-0;
output appearing at ROUT3-0/COUT11-0 will not be of any value. Bit 1 is set to 0 (for single filter mode)
and bit 0 is set to 0 (cascade mode must be disabled). Therefore, to realize 24-bit data/12-bit coefficients
the user must write 008H to Configuration Register 5; conversely, for 12-bit data/24-bit coefficients the user
must write 00CH to Configuration Register 5.
The Double Wide Data/Coefficient Mode is valid in the Matrix Multiplication Mode; however, special
considerations must be observed when these two modes are combined. The LF3321 must be configured
for single filter mode only, for a maximum (8x8) matrix. In addition, the user must disable the cascaded filter
mode, the accumulator access mode, and the data reversal (Table 7). For additional considerations, refer to
the corresponding mode of operation section.
SHENA / SHENB
TXFRA/ TXFRB
Figure 20. Single Filter, Matrix Multiply Timing Sequence
CENA / CENB
DOUT
DIN
RIN
CAA
CAB
CLK
11-0
11-0
15-0
7-0
7-0
*
**
***
11 Clocks - First Output of First Data/Coefficient Set
16 Clocks - End of First Data/Coefficient Set
26 Clocks - Final Output of First Data/Coefficient Set
CF
1
00
DATA SET 0
CF
2
01
CF
3
02
1 Data Set with 16 Coefficient Sets
19
CF
11*
OUT 0
0A
CF
12
OUT 1
0B
DATA SET 0
CF
13
OUT 2
0C
CF
14
Horizontal Digital Image Filter
OUT 3
0D
CF
15
0E
OUT 4
CF
Improved Performance
16**
OUT 5
0F
Video Imaging Products
CF
17
10
OUT 6
Feb 5, 2003 LDS.3321-A
26***
OUT 15
LF3321

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