m38039mf-xxxsp Mitsumi Electronics, Corp., m38039mf-xxxsp Datasheet - Page 55

• Manufacturer Part Number: m38039mf-xxxsp
• Description: Single-chip 8-bit Cmos Microcomputer
• Manufacturer: Mitsumi Electronics, Corp.

3. S
When signals are output from the S
by using an external clock in the clock synchronous serial I/O
mode, set all of the receive enable bit, the S
and the transmit enable bit to “1” (transmit enabled).
4. Setting serial I/O control register again
Set the serial I/O control register again after the transmission and
the reception circuits are reset by clearing both the transmit en-
able bit and the receive enable bit to “0.”
5. Data transmission control with referring to transmit shift
The transmit shift register completion flag changes from “1” to “0”
with a delay of 0.5 to 1.5 shift clocks. When data transmission is
controlled with referring to the flag after writing the data to the
transmit buffer register, note the delay.
6. Transmission control when external clock is selected
When an external clock is used as the synchronous clock for data
transmission, set the transmit enable bit to “1” at “H” of the S
input level. Also, write data to the transmit buffer register at “H” of
the S
Note
Note
register completion flag
Note
Note
Clear both the transmit enable bit
(TE) and the receive enable bit
(RE) to “0”
Set the bits 0 to 3 and bit 6 of the
serial I/O control register
Set both the transmit enable bit
(TE) and the receive enable bit
(RE), or one of them to “1”
RDY
CLK
output of reception side
input level.
RDY
pin on the reception side
RDY
Can be set with the
LDM instruction at the
same time
output enable bit,
CLK
7. Transmit interrupt request when transmit enable bit is set
When using the transmit interrupt, take the following sequence.
When the transmit enable bit is set to “1”, the transmit buffer
empty flag and the transmit shift register shift completion flag are
also set to “1”. Therefore, regardless of selecting which timing for
the generating of transmit interrupts, the interrupt request is gener-
ated and the transmit interrupt request bit is set at this point.
Note
Set the serial I/O transmit interrupt enable bit to “0” (disabled).
Set the transmit enable bit to “1”.
Set the serial I/O transmit interrupt enable bit to “1” (enabled).
Reason
Set the serial I/O transmit interrupt request bit to “0” after 1 or
more instruction has executed.
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3803/3804 Group
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