scf5249 Freescale Semiconductor, Inc, scf5249 Datasheet - Page 6

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scf5249

Manufacturer Part Number
scf5249
Description
Scf5249 Integrated Coldfire
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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160 MAPBGA Ball Assignments
4
The following signals are not available on the 144 QFP package.
6
System debug support
— Real-time instruction trace for determining dynamic execution path
— Background debug mode (BDM) for debug features while halted
— Debug exception processing capability
— Real-time debug support
System Interface
— Glueless bus interface with four chip selects and DRAMC support for interface to
— Programmable interrupt controller
— 44 programmable general-purpose inputs*
— 46 programmable general-purpose outputs*
— IEEE 1149.1 Test (JTAG) Module
Clocking
— Clock-multiplied PLL, programmable frequency
1.8V Core, 3.3V I/O
160 pin MAPBGA package (qualified at 140 MHz) and 144 pin QFP package (qualified at 120
MHz)
160 MAPBGA Ball Assignments
16-bit for DRAM, SRAM, ROM, FLASH, and I/O devices
– Two programmable chip-select signals for static memories or peripherals, with
– Two dedicated chip selects for 16-bit wide DRAM /SDRAM.
– CS0 is active after reset to provide boot-up from external FLASH/ROM.
– Low interrupt latency
– Eight external interrupt requests
– Programmable autovector generator
– * For the 160 MAPBGA package
programmable wait states and port sizes.
The 144 QFP part is qualified for 120 MHz operation. The 160MAPBGA
part is qualified for 140 MHz.
SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3
NOTE
Freescale Semiconductor

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