scf5249 Freescale Semiconductor, Inc, scf5249 Datasheet - Page 33
scf5249
Manufacturer Part Number
scf5249
Description
Scf5249 Integrated Coldfire
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.SCF5249.pdf
(56 pages)
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9.1.1
Table 20
Freescale Semiconductor
lists processor bus input timings.
Processor Bus Input Timing Specification
Num
B0
B1
B2
B4
Signals above are shown in relation to the clock. No relationship between
signals is implied or intended.
All processor bus timings are synchronous; that is, input setup/hold and
output delay with respect to the rising edge of a reference clock. The
reference clock is the SCLK output. All other timing relationships can be
derived from these values.
PSTCLK
SCLK
Control input valid to SCLK high
SCLK high to control inputs valid
Data input (D[31:0]) valid to SCLK high
BCLK
CRIN
SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3
Table 20. External Bus Input Timing Specifications
Characteristic
Figure 5. Clock Timing Definition
C8
a
b
b
NOTE
NOTE
C6
C7
Symbol
tDIVCH
tCVCH
tCHCII
tCYC
14.26
Min
10
2
6
C6
C8
Max
—
—
—
—
Electrical Characteristics
Units
ns
ns
ns
ns
33