cop8cde9 National Semiconductor Corporation, cop8cde9 Datasheet - Page 9

• Manufacturer Part Number: cop8cde9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom, 10-bit A/d And Brownout Reset
• Manufacturer: National Semiconductor Corporation

Resolution
DNL
DNL
INL
INL
Offset Error
Offset Error
Gain Error
Gain Error
Input Voltage Range
Analog Input Leakage Current
Analog Input Resistance (Note 9)
Analog Input Capacitance
Conversion Clock Period
Conversion Time (including S/H Time)
Operating Current on AV
Input Pulse Width
Output Pulse Width
USART Bit Time when using External
CKX
USART CKX Frequency when being
Driven by Internal Baud Rate Generator
Reset Pulse Width
t
Note 2: Maximum rate of voltage change must be
Note 3: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180˚ out of phase with CKI, inputs connected to V
and outputs driven low but not connected to a load.
Note 4: The HALT mode will stop CKI from oscillating. Measurement of I
H and L programmed as low outputs and not driving a load; all inputs tied to V
mode entered via setting bit 7 of the G Port data register.
Note 5: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
be limited to
Note 6: If timer is in high speed mode, the minimum time is 1 MCLK. If timer is not in high speed mode, the minimum time is 1 t
Note 7: Absolute Maximum Ratings should not be exceeded.
Note 8: V
Note 9: Resistance between the device input and the internal sample and hold capacitance.
C
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Interrupt Input High Time
Interrupt Input Low Time
Timer 1 Input High Time
Timer 1 Input Low Time
Timer 2 Input High Time (Note 6)
Timer 2 Input Low Time (Note 6)
Timer 2 Output High Time
Timer 2 Output Low Time
= instruction cycle time.
cc
must be valid and stable before G6 is raised to a high voltage.
<
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes ESD transients.
>
Parameter
Parameter
V
CC
A/D Converter Electrical Characteristics (0˚C
(the pins do not have source current when biased at a voltage below V
CC
AC Electrical Characteristics (0˚C
<
0.5 V/ms.
V
V
V
V
V
V
V
V
2.7V
4.5V
2.7V
AV
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 5V
= 3V
= 5V
= 3V
= 5V
= 3V
= 5V
= 3V
Conditions
= 5.5V
V
V
V
Conditions
CC
CC
CC
DD
<
<
<
HALT is done with device neither sourcing nor sinking current; with A. B, G0, G2–G5,
5.5V
5.5V
4.5V
CC
9
; A/D converter and clock monitor and BOR disabled. Parameter refers to HALT
T
A
T
A
+70˚C) (Single-ended mode only)
Min
0.8
1.2
0
+70˚C) (Continued)
CC
). These two pins will not latch up. The voltage at the pins must
periods
6 CKI
Min
150
150
1
1
1
1
1
1
1
>
Typ
0.2
15
V
CC
and the pins will have sink current to V
Typ
±
±
±
±
Max
V
0.5
0.6
±
±
±
±
10
6k
30
30
C
1.5
2.5
1.5
2.5
CC
7
1
1
2
4
.
Max
2
MCLK or t
MCLK or t
Conversion
www.national.com
Cycles
Units
Clock
Units
MHz
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
Bits
A/D
mA
µA
pF
µs
µs
CC
ns
ns
V
t
t
t
t
t
C
C
C
C
C
when
CC
C
C