atxmega128a3-mu ATMEL Corporation, atxmega128a3-mu Datasheet - Page 6

• Manufacturer Part Number: atxmega128a3-mu
• Description: 8/16-bit Xmega Microcontroller
• Manufacturer: ATMEL Corporation

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6.4
6.5
8068A–AVR–02/08
Register File
ALU - Arithmetic Logic Unit
Program Flow
The fast-access Register File contains 32 x 8-bit general purpose working registers with a single
clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typ-
ical ALU operation, two operands are output from the Register File, the operation is executed,
and the result is stored back in the Register File - in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data
Space addressing - enabling efficient address calculations. One of these address pointers can
also be used as an address pointer for look up tables in Flash program memory.
The high performance Arithmetic Logic Unit (ALU) supports arithmetic and logic operations
between registers or between a constant and a register. Single register operations can also be
executed in the ALU. Within a single clock cycle, arithmetic operations between general purpose
registers or between a register and an immediate are executed. After an arithmetic or logic oper-
ation, the Status Register is updated to reflect information about the result of the operation.
The ALU operations are divided into three main categories – arithmetic, logical, and bit-func-
tions. Both 8-, 16 and 32-bit arithmetic is supported. The ALU also provide a powerful multiplier
supporting both signed/unsigned multiplication and fractional format.
Program flow is provided by conditional and unconditional jump and call instructions, able to
address the whole address space directly. Most AVR instructions use a 16-bit word format.
Some instructions also use a 32-bit format.
The Program Flash memory space is divided in two sections, the Boot section and the Applica-
tion section. Both sections have dedicated Lock bits for write and read/write protection. The
Store Program Memory (SPM) instruction used to access the Application section must reside in
the Boot section.
A third section exists inside the Application section. This section, the Application Table section,
has separate Lock bits for write and read/write protection. The Application Table section can be
used for storing non-volatile data or application software.
The Program Counter (PC) addresses the location from where the instructions are fetched. After
a reset, the PC is set to location ‘0’.
During interrupts and subroutine calls, the return address PC is stored on the Stack. The Stack
is effectively allocated in the general data SRAM, and consequently the Stack size is only limited
by the total SRAM size and the usage of the SRAM. The Stack Pointer (SP) is default reset to
the highest address of the internal SRAM. The SP is read/write accessible in the I/O space. The
data SRAM can easily be accessed through the five different addressing modes supported in the
AVR architecture.
ATxmega A3
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