atxmega128a3-mu ATMEL Corporation, atxmega128a3-mu Datasheet - Page 23

• Manufacturer Part Number: atxmega128a3-mu
• Description: 8/16-bit Xmega Microcontroller
• Manufacturer: ATMEL Corporation

14. I/O Ports
14.1
14.2
14.3
8068A–AVR–02/08
Features
Overview
I/O configuration
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The XMEGA A3 has flexible General Purpose I/O (GPIO) Ports. A port consists of up to 8 pins,
ranging from pin 0 to pin 7. The ports implement several functions, including interrupts, synchro-
nous/asynchronous input sensing and configurable output settings. All functions are individual
per pin, but several pins may be configured in a single operation.
All port pins have programmable output configuration. In addition, all GPIO pins have inverted
I/O. For an input, this means inverting the signal between the port pin and the pin register. For
an output, this means inverting the output signal between the port register and the port pin.
Some port pins also have configurable slew rate limitation to reduce electromagnetic emission.
The configuration options include:
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Selectable input and output configuration for each pin individually
Flexible pin configuration through dedicated Pin Configuration Register
Synchronous and/or asynchronous input sensing with port interrupts and events
Asynchronous wake-up signalling
Highly configurable output driver and pull settings:
Slew rate control
Flexible pin masking
Configuration of multiple pins in a single operation
Read-Modify-Write (RMW) support
Toggle/clear/set registers for OUT and DIR registers
Clock output on port pin
Event Channel 7 output on port pin
Mapping of port registers (virtual ports) into bit accessible I/O memory space
Push-pull
Pull-down resistor
Pull-up resistor
Bus keeper
Inverted I/O
Slew rate limitation
– Sense both edges
– Sense rising edges
– Sense falling edges
– Sense low level
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Totem-pole
Pull-up/-down
Wired-AND
Wired-OR
Bus keeper
Inverted I/O
ATxmega A3
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