atxmega128a3-mu ATMEL Corporation, atxmega128a3-mu Datasheet - Page 11
atxmega128a3-mu
Manufacturer Part Number
atxmega128a3-mu
Description
8/16-bit Xmega Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.ATXMEGA128A3-MU.pdf
(62 pages)
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8. DMA - Direct Memory Access Controller
8.1
8.2
8068A–AVR–02/08
Features
Overview
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The XMEGA A3 has a Direct Memory Access (DMA) controller to move data between memories
and peripherals in the data space. The DMA controller uses the same data bus as the CPU to
transfer data.
The XMEGA A3 has 4 DMA channels that may be configured independently. The DMA control-
ler supports transfer of up to 64K data blocks and can be configured to access memory with
incrementing, decrementing or static addressing.
Since the DMA can access all the peripherals through the I/O memory, the DMA may be used
for automatic transfer of data to/from communication modules, as well as automatic data
retrieval from ADC conversions or data transfer to DAC conversions.
The DMA controller can read from memory mapped EEPROM, but it cannot write to the
EEPROM or access the Flash.
Allows High-speed data transfer
4 Channels
From 1 byte and up to 16 M bytes transfers in a single transaction
Multiple addressing modes for source and destination address
1, 2, 4, or 8 bytes Burst Transfers
Programmable priority between channels
– From memory to peripheral
– From memory to memory
– From peripheral to memory
– From peripheral to peripheral
– Incremental
– Decremental
– Static
ATxmega A3
11
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