at32ap7002 ATMEL Corporation, at32ap7002 Datasheet - Page 5

• Manufacturer Part Number: at32ap7002
• Description: Avr 32 32-bit Microcontroller
• Manufacturer: ATMEL Corporation

2.0.1
2.0.2
32054DS–AVR32–10/07
AVR32AP CPU
Pixel Coprocessor (PICO)
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32-bit load/store AVR32B RISC architecture.
7 stage pipeline allows one instruction per clock cycle for most instructions.
Full MMU allows for operating systems with memory protection.
16Kbyte Instruction and 16Kbyte data caches.
Nexus Class 3 On-Chip Debug system.
Coprocessor coupled to the AVR32 CPU Core through the TCB Bus.
Three parallel Vector Multiplication Units (VMU) where each unit can:
Can be used for accelerating:
Flexible input Pixel Selector.
Flexible Output Pixel Inserter.
– Up to 15 general-purpose 32-bit registers.
– 32-bit Stack Pointer, Program Counter and Link Register reside in register file.
– Fully orthogonal instruction set.
– Privileged and unprivileged modes enabling efficient and secure Operating Systems.
– Innovative instruction set together with variable instruction length ensuring industry leading
– DSP extention with saturating arithmetic, and a wide variety of multiply instructions.
– SIMD extention for media applications.
– Java Hardware Acceleration.
– Byte, half-word, word and double word memory access.
– Unaligned memory access.
– Shadowed interrupt context for INT3 and multiple interrupt priority levels.
– Dynamic branch prediction and return address stack for fast change-of-flow.
– Coprocessor interface.
– Virtually indexed, physically tagged.
– 4-way associative.
– Write-through or write-back.
– Low-cost NanoTrace supported.
– Coprocessor number one on the TCB bus.
– Multiply three pixel components with three coefficients.
– Add the products from the multiplications together.
– Accumulate the result or add an offset to the sum of the products.
– Image Color Space Conversion.
– Image filtering/scaling.
– MPEG-4/H.264 Quarter Pixel Motion Compensation.
– Can operate on numerous different image storage formats.
– Scales and saturates the results back to 8-bit pixel values.
– Supports packed and planar output formats.
code density.
• Configurable Conversion Coefficients.
• Supports packed and planar input and output formats.
• Supports subsampled input color spaces (i.e 4:2:2, 4:2:0).
• Configurable Filter Coefficients.
• Throughput of one sample per cycle for a 9-tap FIR filter.
• Can use the built-in accumulator to extend the FIR filter to more than 9-taps.
• Can be used for bilinear/bicubic interpolations.
AT32AP7002
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