atmega323l ATMEL Corporation, atmega323l Datasheet - Page 62

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atmega323l

Manufacturer Part Number
atmega323l
Description
Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
62
ATmega323(L)
Figure 38. Effects of Unsynchronized OCR1 Latching.
Figure 39. Effects of Unsynchronized OCR1 Latching in Overflow Mode
During the time between the write and the latch operation, a read from OCR1A or
OCR1B will read the contents of the temporary location. This means that the most
recently written value always will read out of OCR1A/B.
When the OCR1X contains $0000 or TOP, and the up/down PWM mode is selected, the
output OC1A/OC1B is updated to low or high on the next compare match according to
the settings of COM1A1/COM1A0 or COM1B1/COM1B0. This is shown in Table 23. In
overflow PWM mode, the output OC1A/OC1B is held low or high only when the Output
Compare Register contains TOP.
Note: x = A or B
Note: X = A or B
Unsynchronized OC1x Latch
Synchronized OC1x Latch
Synchronized OC1x Latch
Unsynchronized OC1x Latch
PWM Output OC1x
PWM Output OC1x
PWM Output OC1x
PWM Output OC1x
1457G–AVR–09/03

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