atmega323l ATMEL Corporation, atmega323l Datasheet - Page 138
atmega323l
Manufacturer Part Number
atmega323l
Description
Atmega323 8-bit Avr Microcontroller With 32k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA323L.pdf
(247 pages)
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Port A as General Digital I/O
Port A Schematics
138
ATmega323(L)
All 8-bits in Port A are equal when used as digital I/O pins.
PAn, General I/O pin: The DDAn bit in the DDRA Register selects the direction of this
pin, if DDAn is set (one), PAn is configured as an output pin. If DDAn is cleared (zero),
PAn is configured as an input pin. If PORTAn is set (one) when the pin configured as an
input pin, the MOS pull up resistor is activated. To switch the pull up resistor off, the
PORTAn has to be cleared (zero), the pin has to be configured as an output pin, or the
PUD bit has to be set. The Port A pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Table 48. DDAn Effects on Port A Pins
Note:
Note that all port pins are synchronized. The synchronization latches are not shown in
the figure.
Figure 66. Port A Schematic Diagrams (Pins PA0 - PA7)
DDAn
0
0
0
1
1
1. n: 7,6…0, pin number.
PORTAn
PDn
0
1
1
0
1
MOS
PULL-
UP
WP:
WD:
RL:
RP:
RD:
n:
PUD: PULL-UP DISABLE
(in SFIOR)
WRITE PORTA
WRITE DDRA
READ PORTA LATCH
READ PORTA PIN
READ DDRA
0-7
PUD
X
0
1
X
X
PWRDN
Output
Output
Input
Input
Input
I/O
PUD
(1)
Pull Up
Yes
No
No
No
No
RL
RP
Comment
Tri-state (Hi-Z)
Tri-state (Hi-Z)
PAn will source current if ext. pulled
low.
Push-pull Zero Output
Push-pull One Output
TO ADC MUX
Q
Q
PORTAn
RESET
RESET
DDAn
WD
WP
RD
C
C
D
D
ADCn
1457G–AVR–09/03
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