lm96080cimt National Semiconductor Corporation, lm96080cimt Datasheet - Page 27

• Manufacturer Part Number: lm96080cimt
• Description: System Hardware Monitor With 2-wire Serial Interface
• Manufacturer: National Semiconductor Corporation

1-7 Reserved
Bit
Bit
0
0
1
2
3
4
5
6
7
12.10 Conversion Rate Register—Address 07h
Power on default <7:0> = 0000 0000 binary
12.11 Voltage/Temperature Channel Disable Register—
Address 08h
Power on default <7:0> = 0000 0000 binary
CR1
IN0
IN1
IN2
IN3
IN4
IN5
IN6
Temp
Name
Name
Read/Write
Read only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Controls conversion rate:
0 = 728ms (typical)
1 = Continuous Conversion.
Note:
— Each voltage channel conversion takes 3 ms typical.
— Temperature conversion takes 3.6 ms typical for 9 - bit resolution and 23.5 ms typical for
12 - bit resolution.
— Each fan tachometer input is monitored for 2 pulses, the time interval for two pulses is
added to the round robin time for each fan tach input that is enabled.
Reserved — will always report zero.
When set to "1", IN0:
When set to "1", IN1:
When set to "1", IN2:
When set to "1", IN3:
When set to "1", IN4:
When set to "1", IN5:
When set to "1", IN6:
When set to "1", Temperature:
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register reading will be 0
error events will be suppressed
conversions are skipped and disabled
value register readings will be 0
error events will be suppressed
27
Description
Description
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