lm5066pmhx National Semiconductor Corporation, lm5066pmhx Datasheet - Page 45
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lm5066pmhx
Manufacturer Part Number
lm5066pmhx
Description
High Voltage System Power Management And Protection Ic With Pmbus
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM5066PMHX.pdf
(48 pages)
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SMBA Response
The SMBA effectively has two masks:
1. The Alert Mask Register at D8h, and
2. The ARA Automatic Mask.
The ARA Automatic Mask is a mask that is set in response to
a successful ARA read. An ARA read operation returns the
PMBus address of the lowest addressed part on the bus that
has its SMBA asserted. A successful ARA read means that
THIS part was the one that returned its address. When a part
responds to the ARA read, it releases the SMBA signal. When
FIGURE 20. Typical Flow Schematic for SMBA Fault
45
the last part on the bus that has an SMBA set has successfully
reported its address, the SMBA signal will de-assert.
The way that the LM5066 releases the SMBA signal is by
setting the ARA Automatic mask bit for all fault conditions
present at the time of the ARA read. All status registers will
still show the fault condition, but it will not generate and SM-
BA on that fault again until the ARA Automatic mask is cleared
by the host issuing a CLEAR_FAULTS command to this part.
This should be done as a routine part of servicing an SMBA
condition on a part, even if the ARA read is not done.
20
depicts a schematic version of this flow.
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Figure