lm5066pmhx National Semiconductor Corporation, lm5066pmhx Datasheet - Page 25

• Manufacturer Part Number: lm5066pmhx
• Description: High Voltage System Power Management And Protection Ic With Pmbus
• Manufacturer: National Semiconductor Corporation

SYSTEM CONSIDERATIONS
A) Continued proper operation of the LM5066 hot swap circuit
requires a voltage clamping element present on the supply
side of the connector into which the hot swap circuit is plugged
in. A TVS is ideal, as depicted in
essary to absorb the voltage transient generated whenever
the hot swap circuit shuts off the load current. If the TVS is
not present, inductance in the supply lines will generate a
voltage transient at shut-off which can exceed the absolute
maximum rating of the LM5066, resulting in its destruction.
PC BOARD GUIDELINES
The following guidelines should be followed when designing
the PC board for the LM5066:
- Place the LM5066 close to the board’s input connector to
minimize trace inductance from the connector to the MOS-
FET.
- Place a TVS, Z
of the LM5066 to help minimize voltage transients which may
occur on the input supply line. The TVS should be chosen
such that the peak V
age. Transients of 20 volts or greater over the nominal input
voltage can easily occur when the load current is shut off. A
small capacitor may be sufficient for low current sense appli-
cations (I < 2A). It is recommended to test the VIN input
voltage transient performance of the circuit by current limiting
or shorting the load and measuring the peak input voltage
transient.
- Place a 1 µF ceramic capacitor as close as possible to VREF
pin.
- Place a 1 µF ceramic capacitor as close as possible to VDD
pin.
- Minimize the inductance between the VIN and VIN_K pins.
There are anti-parallel diodes between these pins so any volt-
age greater than 0.3V in either polarity will cause significant
current flow through the diodes, which can result in device
failure. Do not place any resistors between these two nodes.
- Minimize the impedance between the VIN_K and SENSE
pins. There are anti-parallel diodes between these pins so any
voltage greater than 0.3V in either polarity will cause signifi-
1
, directly adjacent to the VIN and GND pins
IN
is just lower the TVS reverse-bias volt-
Figure
FIGURE 16. Output Diode Required for Inductive Loads
16. The TVS is nec-
25
For low current solutions (<2A), a capacitor may be sufficient
to limit the voltage surge, however this comes at the expense
of input surge current on card insertion.
If the load powered by the LM5066 hot swap circuit has in-
ductive characteristics, a Schottky diode is required across
the LM5066’s output, along with some load capacitance. The
capacitance and the diode are necessary to limit the negative
excursion at the OUT pin when the load current is shut off. If
the OUT pin transitions more than 0.3V negative the LM5066
can be permanently damaged. See
cant current flow through the diodes, which can result in
device failure.
- The sense resistor (R
LM5066. A trace should connect the VIN pad and Q
the sense resistor to VIN_K and SENSE pins, respectively.
Connect R
- The high current path from the board’s input to the load (via
Q
other to minimize loop inductance.
- The AGND and GND connections should be connected at
the pins of the device.The ground connections for the various
components around the LM5066 should be connected direct-
ly to each other, and to the LM5066’s GND and AGND pin
connection, and then connected to the system ground at one
point. Do not connect the various component grounds to each
other through the high current ground line.
- Provide adequate thermal sinking for the series pass device
(Q
- The board’s edge connector can be designed such that the
LM5066 detects via the UVLO/EN pin that the board is being
removed, and responds by turning off the load before the
supply voltage is disconnected. For example, in
voltage at the UVLO/EN pin goes to ground before V
moved from the LM5066 as a result of the shorter edge
connector pin. When the board is inserted into the edge con-
nector, the system voltage is applied to the LM5066’s VIN pin
before the UVLO voltage is taken high, thereby allowing the
LM5066 to turn on the output in a controlled fashion.
1
1
), and the return path, should be parallel and close to each
) to help reduce stresses during turn-on and turn-off.
S
using the Kelvin techniques shown in
S
) should be placed close to the
Figure
30115954
16.
Figure
www.national.com
Figure
1
IN
17, the
pad of
is re-
7.