psd4235g2 STMicroelectronics, psd4235g2 Datasheet - Page 70

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psd4235g2

Manufacturer Part Number
psd4235g2
Description
Flash In-system Programmable Isp Peripherals For 16-bit Mcus 5v Supply
Manufacturer
STMicroelectronics
Datasheet

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MCU bus interface
19.1
Figure 18. An example of a typical 16-bit multiplexed bus interface
70/129
RESET
MCU
PSD interface to a multiplexed bus
Figure 18
PSD4235G2. The ADIO port on the PSD is connected directly to the MCU address/data
bus. Address Strobe (ALE/AS, PD0) latches the address signals internally. Latched
addresses can be brought out to Port E, F or G. The PSD drives the ADIO data bus only
when one of its internal resources is accessed and Read Strobe (RD, CNTL1) is active.
Should the system address bus exceed sixteen bits, Ports A, B, C, or F may be used as
additional address inputs.
BHE
ALE
WR
RD
shows an example of a system using a MCU with a 16-bit multiplexed bus and a
AD[15:8] 1
AD [ 7:0 ]
or A[15:8]
PSD
WR ( CNTRL0 )
RD ( CNTRL1 )
BHE ( CNTRL2 )
RST
ALE ( PD0 )
PORT D
PORT
ADIO
PORT
PORT
PORT
G
A
F
( OPTIONAL )
( OPTIONAL )
( OPTIONAL )
A [ 23:16 ]
A [ 7: 0 ]
A [ 15: 8 ]
PSD4235G2
AI04928B

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