psd4235g2 STMicroelectronics, psd4235g2 Datasheet - Page 33

• Manufacturer Part Number: psd4235g2
• Description: Flash In-system Programmable Isp Peripherals For 16-bit Mcus 5v Supply
• Manufacturer: STMicroelectronics

PSD4235G2
6.17
PLD Array WRH
VM register
Table 25.
On reset, bit1-Bit4 are loaded to configurations that are selected by the user in PSDsoft
Express. bit0 and bit7 are always cleared on reset. bit0-Bit4 are active only when the device
is configured in Philips 80C51XA mode.
SR_code
Boot_code
FL_code
Boot_data
FL_data
Peripheral mode
Bit 7
Peripheral
mode
0: WRH/DBE input to the PLD AND array is connected.
1: WRH/DBE input to the PLD AND array is disconnected, saving power.
0 = PSEN cannot access SRAM in 80C51XA modes.
1 = PSEN can access SRAM in 80C51XA modes.
0 = PSEN cannot access Secondary NVM in 80C51XA modes.
1 = PSEN can access Secondary NVM in 80C51XA modes.
0 = PSEN cannot access Primary Flash memory in 80C51XA modes.
1 = PSEN can access Primary Flash memory in 80C51XA modes.
0 = RD cannot access Secondary NVM in 80C51XA modes.
1 = RD can access Secondary NVM in 80C51XA modes.
0 = RD cannot access Primary Flash memory in 80C51XA modes.
1 = RD can access Primary Flash memory in 80C51XA modes.
0 = Peripheral mode of Port F is disabled.
1 = Peripheral mode of Port F is enabled.
Bit 6
not used
(set to ’0’)
VM register
Bit 5
not used
(set to ’0’)
Bit 4
FL_data
Bit 3
Boot_data FL_code
Bit 2
Register bit definition
Bit 1
Boot_code SR_code
Bit 0
33/129