s-24c02ci-t8t1u Seiko Instruments Inc., s-24c02ci-t8t1u Datasheet - Page 27

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s-24c02ci-t8t1u

Manufacturer Part Number
s-24c02ci-t8t1u
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet

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Rev.2.0
6. Data hold time (t
7. SDA pin and SCL pin noise suppression time
If SCL and SDA of the S-24C01C/02C are changed at the same time, it is necessary to prevent a start / stop
condition from being mistakenly recognized due to the effect of noise.
The S-24C01C/02C may error if it does not recognize a start / stop condition correctly during transmission.
In the S-24C01C/02C, it is recommended to set the delay time of 0.3 µ s minimum from a falling edge of SCL for the
SDA.
This is to prevent S-24C01C/02C from going in a start / stop condition due to the time lag caused by the load of the
bus line.
The S-24C01C/02C includes a built-in low-pass filter at the SDA and SCL pins to suppress noise. This means that if
the power supply voltage is 5.0 V, noise with a pulse width of 160 ns or less can be suppressed.
For details of the assurable value, refer to noise suppression time (t
_00_C
Noise Suppression Time (t
SDA
SCL
HD.DAT
Figure 33 Noise Suppression Time for SDA and SCL Pins
= 0 ns)
[ns]
Figure 32 S-24C01C/02C Data Hold Time
I
) Max.
Seiko Instruments Inc.
t
HD.DAT
300
200
100
= 0.3 µs Min.
Power Supply Voltage (V
2
l
) in Table 14 .
3
2-WIRE CMOS SERIAL E
[V]
4
5
CC
)
S-24C01C/02C
2
PROM
27

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