s-24c02ci-t8t1u Seiko Instruments Inc., s-24c02ci-t8t1u Datasheet - Page 18

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s-24c02ci-t8t1u

Manufacturer Part Number
s-24c02ci-t8t1u
Description
2-wire Cmos Serial E2prom
Manufacturer
Seiko Instruments Inc.
Datasheet

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18
2-WIRE CMOS SERIAL E
S-24C01C/02C
LINE
SDA
*1. In the S-24C01C, setting W7 is arbitrary.
7. 2 Random Read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the E
start condition, it responds with an acknowledge.
responds with an acknowledge. The memory address is loaded to the address counter in the E
operations. Reception of write data does not follow in a dummy write whereas reception of write data follows in
byte write and in page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device can
read the data starting from the arbitrary memory address by transmitting a new start condition and performing the
same operation in the current address read.
That is, when the E
following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from the
E
reading of E
R
S
T
A
T
2
PROM in synchronous to the SCL clock. The master device outputs stop condition not an acknowledge, the
M
S
B
1 0 1 0
ADDRESS
DEVICE
2
2
PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “0” following a
PROM is ended.
A2 A1 A0
DUMMY WRITE
S
B
L
2
PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “1”,
W
W
R
R
T
E
0
/
I
2
C
A
K
PROM
W7 W6 W5 W4 W3 W2 W1 W0
WORD ADDRESS (n)
*1
Figure 19 Random Read
Seiko Instruments Inc.
A
C
K
R
S
T
A
T
The E
M
S
B
1 0 1 0
2
PROM then receives an 8-bit word address and
ADDRESS
DEVICE
A2 A1 A0
S
B
L
W
R
R
D
E
A
1
/
C
A
K
D7 D6 D5 D4 D3 D2 D1 D0
NO ACK from
Master Device
DATA
2
Rev.2.0
PROM by these
ADR INC
_00_C
O
S
T
P

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