m34e02 STMicroelectronics, m34e02 Datasheet - Page 6

• Manufacturer Part Number: m34e02
• Description: 2 Kbit Serial I?c Bus Eeprom With Permanent And Reversible, Software Write Protection
• Manufacturer: STMicroelectronics

Summary description
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Summary description
The M34E02 is a 2 Kbit serial EEPROM memory able to lock permanently the data in its first
half (from location 00h to 7Fh). This facility has been designed specifically for use in DRAM
DIMMs (dual interline memory modules) with Serial Presence Detect. All the information
concerning the DRAM module configuration (such as its access speed, its size, its
organization) can be kept write protected in the first half of the memory.
The first half of the memory area can be write-protected using two different software write
protection mechanisms. By sending the device a specific sequence, the first 128 bytes of
the memory become write protected: permanently or resetable. In addition, the device
allows the entire memory area to be write protected, using the WC input (for example by
tieing this input to V
These I
organized as 256x8 bits.
I
The device carries a built-in 4-bit Device Type Identifier code (1010) in accordance with the
I
(0110) to define the protection. These codes are used together with the voltage level applied
on the three chip enable inputs (E2, E1, E0).
The device behaves as a slave device in the I
synchronized by the serial clock. Read and Write operations are initiated by a START
condition, generated by the bus master. The START condition is followed by a Device Select
Code and RW bit (as described in
When writing data to the memory, the memory inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a STOP condition after an Ack for WRITE, and after a NoAck for READ.
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages.
ECOPACK® packages are Lead-free and RoHS compliant.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
2
2
C uses a two wire serial interface, comprising a bi-directional data line and a clock line.
C bus definition to access the memory area and a second Device Type Identifier Code
2
C-compatible electrically erasable programmable memory (EEPROM) devices are
CC
).
Table
2), terminated by an acknowledge bit.
2
C protocol, with all memory operations
M34E02
th
bit