at49ld3200 ATMEL Corporation, at49ld3200 Datasheet - Page 28

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at49ld3200

Manufacturer Part Number
at49ld3200
Description
At49ld3200 32-megabit 1m X 32 Or 2m X 16 High-speed Synchronous Flash Memory
Manufacturer
ATMEL Corporation
Datasheet

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CAS Interrupt
Notes:
Read Interrupt Operation by Issuing the Precharge of Burst Stop Command
Notes:
28
Data(CL2)
Data(CL3)
Data(CL4)
CASE I ) Issued read Interrupt command during burst read operation period.
CASE II ) Issued read Interrupt command between read command and data out.
Read interrupted by Read (BL=4)
1. By “Interrupt”, it is meant to stop Burst Read by external command before the end of burst. By “CAS Interrupt”, to stop Burst
2. CAS to CAS delay (=1 CLK).
1. The data bus goes to high-Z after CAS latency from the Burst Stop (or precharge) command.
2. Valid output data will last up to CL-1 clock cycle from PRE command.
Data(CL2)
Data(CL3)
Data(CL4)
CMD
Data(CL2)
Data(CL3)
Data(CL4)
ADD
CLK
AT49LD3200(B)
CMD
CMD
CLK
CLK
Read by CAS access.
RD
RD
RD
A
(2)
RD
PRE
B
(1)
PRE
DQ
DQ
(2)
0
0
DQB
DQ
DQ
DQ
(1)
0
1
0
0
DQB
DQB
DQ
DQ
DQ
0
1
1
0
0
DQB
DQB
DQB
DQ
2
0
1
1
DQB
DQB
DQB
3
2
1
DQB
DQB
3
2
DQB
Data(CL2)
Data(CL3)
Data(CL4)
Data(CL2)
Data(CL3)
Data(CL4)
3
CMD
CMD
CLK
CLK
RD
RD
STOP
STOP
DQ
DQ
(2)
0
0
DQ
DQ
DQ
(1)
1
0
0
DQ
DQ
DQ
0
1
0
DQ
1
1940B–FLASH–11/01

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