at88rf1354 ATMEL Corporation, at88rf1354 Datasheet - Page 11

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at88rf1354

Manufacturer Part Number
at88rf1354
Description
13.56 Mhz Type B Rf Reader Specification
Manufacturer
ATMEL Corporation
Datasheet
6.2.
8547A−RFID−10/08
Digital Pin Descriptions
6.2.1.
TWI device address select input pin. Selects between two TWI device addresses as shown in Table 4. In SPI
communication mode this pin should be connected to Vss.
Table 4.
6.2.2.
Clock Out pin. The PLL register selects the frequency of the clock which is output on this pin for use by external
circuits. The default CLKO frequency is 1.978 MHz. If the clock is not needed, then the CLKO output should be
disabled by programming the ENB bit of the PLL register to one.
Table 5.
6.2.3.
Interface Select input pin. Selects TWI communications when low. SPI communication mode 0 is selected when high.
6.2.4.
Interface Status output pin. Istat is the serial interface handshaking signal. A high level on Istat indicates that a byte
of data is ready to read from the serial interface port. A low level on Istat indicates that the serial interface buffer is
empty.
Note:
6.2.5.
Reset Bar input pin. A low on ResetB causes the device to reset. ResetB must be pulled high by the host
microcontroller and/or by an external resistor to V
6.2.6.
Serial Clock input pin. In both SPI and TWI serial communication modes this pin is used as the serial interface clock.
ADDR Pin
Bit 1
0
0
1
1
V
V
SS
CC
Use of Istat for serial communications control is mandatory, and the AT88RF1354 will not accept commands
TWI Device Address
CLKO Output Frequency Options
from the host microcontroller when Istat is high.
ADDR [20]
CLK0 [8]
ISEL [10]
Istat [12]
ResetB [9]
SCK [14]
Bit 0
0
1
0
1
Bit 6
0
1
CLKo Frequency
1.978 MHz
3.955 MHz
7.910 MHz
15.82 MHz
Bit 5
1
1
Bit 4
0
0
TWI Device Address
All other values are NOT supported
Bit 3
CC
1
1
when the device is in use.
Bit 2
0
0
13.56 MHz Type B RF Reader
Bit 1
0
1
Bit 0
0
0
TWI_R
$D5
$51
TWI_W
$D4
$50
11

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