z89176 ZiLOG Semiconductor, z89176 Datasheet - Page 48

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z89176

Manufacturer Part Number
z89176
Description
Voice Processing Controllers
Manufacturer
ZiLOG Semiconductor
Datasheet
Z89175/Z89176
Voice Processing Controllers
DSP Interrupts
The DSP processor has three interrupt sources (INT2,
INT1, INT0) (Figure 33). These sources have different pri-
ority levels (Figure 34). The highest priority, the next lower
and the lowest priority level are assigned to INT2, INT1
48
A/D INT
D/A INT
FB DSP
Z8_INT
IPR2
IPR1
IPR0
DSP Execution
Interrupt Priority Logic
FeedBack Z8_INT MPX
INT0
INT1
INT2
Figure 33. DSP Interrupt Priority Structure
Figure 32. DSP Interrupts
Interrupt Request Logic
P R E L I M I N A R Y
INT2
and INT0, respectively (Figure 35). The DSP does not al-
low interrupt nesting (interrupting service routines that are
currently being executed). When two interrupt requests oc-
cur simultaneously the DSP starts servicing the interrupt
with the highest priority level.
INT0
INT2
INT1
INT0
INT1
CLEAR_INT0
CLEAR_INT1
CLEAR_INT2
ENABLE_INT
Interrupt Mask Logic
INT2
DS97TAD0100
INT2
INT1
INT0
Zilog

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