z89136 ZiLOG Semiconductor, z89136 Datasheet - Page 41
z89136
Manufacturer Part Number
z89136
Description
Low-cost Dtad Controller
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z89136.pdf
(66 pages)
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Zilog
Watch-Dog Timer Mode Register (WDTMR). The WDT
is a retriggerable one-shot timer that resets the Z8 if it
reaches its terminal count. The WDT is initially enabled by
executing the WDT instruction and refreshed on subse-
quent executions of the WDT instruction. The WDT circuit
DS97TAD0300
WDTMR (FH) 0FH
*
D7 D6 D5 D4 D3 D2 D1 D0
Default setting after RESET
Figure 28. Watch-Dog Timer Mode Register
P R E L I M I N A R Y
is driven by an on-board RC oscillator or external oscillator
from the XTAL1 pin. The POR clock source is selected
with bit 4 of the WDT register (Figure 28). The WDTMR is
accessable only within 64 Z8 clock cyles after POR.
W No Effect
R
WDT During HALT
0 OFF
1 ON
WDT During STOP
0 OFF
1 ON
XTAL1/INT RC Select for WDT
0 On-Board RC
1 XTAL
WDT TAP
Alway "1"
00
01
10
11
*
*
*
INT RC OSC External Clock
100 ms
15 ms
25 ms
5 ms
*
4096 TpC
1024 TpC
256 TpC
512 TpC
Low-Cost DTAD Controller
Z89135/136 (ROMless)
1-41
1
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