lm49370rl National Semiconductor Corporation, lm49370rl Datasheet - Page 50

• Manufacturer Part Number: lm49370rl
• Description: Audio Sub-system With An Ultra Low Emi, Spread Spectrum, Class D Loudspeaker Amplifier, A Dual-mode Stereo Headphone Amplifier, And A Dedicated Pcm Interface For Bluetooth Transceivers
• Manufacturer: National Semiconductor Corporation

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Bit
5:2 I2S_CLOCK_GEN_MODE This programs a clock divider that divides the clock defined by I2S_CLOCK_SOURCE. This divided
7:6
s
0
1
12.33 I2S PORT CLOCK CONFIGURATION REGISTER
This register is used to control the audio data interfaces.
Note 32: For DAC_MODE = '00', '10', '11', DAC_CLOCK is the clock at the output of the R divider. For DAC_MODE = '01', DAC_CLOCK is a divided by two
version of the clock at the output of the R divider.
I2S_CLOCK_SOURCE
PCM_SYNC_WIDTH
I2S_CLOCK_MS
Field
If set, then I
driven by the device slave.
This selects the source of the clock to be used by the I2S clock generator.
clock is used to generate I2S_CLK in Master mode. (Note 32)
This programs the width of the PCM sync signal.
I2S_CLOCK_SOURCE
2
S clock generation is enabled and is Master. If this bit is cleared, then the I
Value
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
00
01
10
11
0
1
TABLE 34. I2S Clock (0x1Bh)
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
50
Divide By
Should not be set if the bits/word is less than 16.
3.90625
Description
7.8125
2.5
10
16
20
—
—
—
1
2
4
6
8
3
5
15 bits (Used for Long PCM Modes)
4 bits (Used for Long PCM Modes)
8 bits (Used for Long PCM Modes)
1 bit (Used for Short PCM Modes)
Generated SYNC Looks like:
ADC (from Q divider)
DAC (from R divider)
Clock is source from
32/125
25/125
16/125
Ratio
2/5
1/3
—
—
—
—
2
S clock is