pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 29

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pef22504

Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
Table 1
Pin No.
H2
N4
M6
Multi Function Pins
D2
D3
D1
D4
D2
D3
D1
D4
D2
D3
D1
D4
D2
D3
D1
D4
D2
D3
D1
D4
D2
D3
D1
D4
Data Sheet
I/O Signals (cont’d)for P/PG-LBGA-160-1
Name
FCLKX3
XDI4
FCLKX4
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
RPA1
RPB1
RPC1
RPD1
Pin Type Buffer
I/O
I
I/O
I/O
I
I
O
O
O
Type
PU/–
PU
PU
29
Function
Framer Data Clock Transmit, port 3
See description of FCLKX1.
Transmit Data In, port 4
See description of XDI1.
Framer Data Clock Transmit, port 4
See description of FCLKX1.
Receive Multifunction Pins A to D, port 1
Depending on programming of bits PC(1:4).RPC(3:0)
these multifunction ports carry information to the framer
interface or from the framer to the QuadLIU
reset these ports are configured to be inputs. With the
selection of the appropriate pin function, the
corresponding input/output configuration is achieved
automatically. Depending on bit DIC3.RESR
latching/transmission of data is done with the rising or
falling edge of FCLKR. If not connected, an internal pull-
up transistor ensures a high input level.
An input function must not be selected twice or more.
Selectable pin functions are described below.
Receive Line Termination (RLT), port 1
PC(1:4).RPC(3:0) = ´1000
These input function controls together with LIM0.RTRS
the analog switch of the receive line interface: A logical
equivalence is build out of LIM0.RTRS and RLT.
General Purpose Input (GPI), port 1
PC(1:4).RPC(3:0) = ´1001
The pin is set to input. The state of this input is reflected
in the register bits MFPI.RPA, MFPI.RPB or MFPI.RPC
respectively.
General Purpose Output High (GPOH), port 1
PC(1:4).RPC(3:0) = ´1010
The pin level is set fix to high level.
General Purpose Output Low (GPOL), port 1
PC(1:4).RPC(3:0) = ´1011
The pin level is set fix to low-level.
Loss of Signal Indication Output (LOS), port 1
PC(1:3).RPC(3:0) = ´1100
The output reflects the Loss of Signal status as readable
in LSR0.LOS.
b
b
b
b
b
´.
.
´.
´.
.
Rev. 1.3, 2006-01-25
Pin Descriptions
QuadLIU
PEF 22504
TM
. After
TM

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