pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 103

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Figure 37
Table 28
R
%
2
2
7.5
2
1) The values in this column refers to an ideal transformer without any parasitics. Any transformer resistance or other parasitic
Similar to the receive line interface two different data types are supported:
•
•
An overview of the transmit line coding is given in
3.9.2
The transmit clock input TCLK (multi function port) of the QuadLIU
12.352 and 24.704 MHz input frequency in T1/J1 mode and 2.048, 4.096, 8.192, 16.384 and 32.768 MHz input
frequency in E1 mode. Frequency selection is done by the register bits CMR6.STF(2:0) (CMR6). See divider “%”
in
3.9.3
The transmit clock output XCLK can be derived from TCLK
•
•
If TCLK fails, the transmit clock output XCLK will also fail. To avoid this, a so called automatic transmit clock
switching can be enabled by setting the register bit CMR6.ATCS (CMR6). Then FCLKX will be used instead of
TCLK if TCLK is lost. The transmit elastic buffer must be active. Automatically switching between TCLK and
FCLKX is done in the following both cases:
•
Data Sheet
1)
SER
Figure
resistances have to be taken into account when calculating the final value of the output serial resistors.
Ternary Signal: Single-rail data is converted into a ternary signal which is output on pins XL1 and XL2.
Selection between B8ZS or simple AMI coding is provided.
Unipolar data on port XOID is transmitted in CMI code with or without (DIC3.CMI) preprocessed by B8ZS
coding or HDB3 precoding (MR3.CMI) to a fiber-optical interface. Clocking off data is done with the rising edge
of the transmit clock XCLK (1544 kHz) and with a programmable polarity. Selection is done by MR0.XC1 = ´0´
and LIM1.DRS = ´1´.
Directly. In this case the TCLK frequency must be 32.768 MHz in E1 or 24.704 MHz in T1/J1 mode. or
With using the DCO-X, were the DCO-X reference is TCLK.
If the TCLK input is used directly as source for the transmit clock XCLK, the output of the DCO-X is not used.
The DCO-X reference clock is FCLKX. If loss of TCLK is detected, the transmit clock XCLK will be switched
automatically (if CMR6.ATCS = ´1´) to the DCO-X output which is synchronous to FCLKX (see multiplexer “H”
in
(Ohm), accuracy +/- 1
Figure
36.
Transmit Line Interface
Recommended Transmitter Configuration Values
Transmit Clock TCLK
Automatic Transmit Clock Switching
36). If XCLK was switched to the DCO-X output and TCLK becomes active, switching of XCLK (back)
Z
0
Application Mode
Generic
Non generic
externally
R
R
SER
SER
Table
XL1
XL2
103
13.
PC6.TSRE
1
0
0
0
R
R
internally
TX
TX
TM
can be configured for 1.544, 3.088, 6.176,
QLIU_TX-interface
XL3, XL4
Connected to
R
Xformer junction
Left open
Left open
SER
and
Functional Description
Rev. 1.3, 2006-01-25
Operation
Mode
E1
T1/J1
E1
T1/J1
QuadLIU
PEF 22504
TM