w83627hf-pw Winbond Electronics Corp America, w83627hf-pw Datasheet - Page 107

• Manufacturer Part Number: w83627hf-pw
• Description: W83627hf/f W83627hg/g Winbond Lpc I/o
• Manufacturer: Winbond Electronics Corp America

CRE3 Keyboard/Mouse Wake-Up Status Register（Read Only）
CRE4 （Default 0x00）
1 - 0
BIT
BIT
7-6
6-5
5
4
3
2
1
0
7
4
3
2
Reserved.
When 1 is VSB Power Loss status.
PWRLOSS_STS. This bit is set when power loss occurs. This bit is control by CRE4[7]
CIR_STS. The Panel switch event is caused by CIR wake-up event. This bit is cleared
by reading this register.
PANSW_STS. The Panel switch event is caused by PANSW_IN. This bit is cleared by
reading this register.
MOUSE_STS. The Panel switch event is caused by Mouse wake-up event. This bit is
cleared by reading this register.
KB_STS. The Panel switch event is caused by Keyboard wake-up event. This bit is
cleared by reading this register.
Power loss control bit 2.
0： Indicates that PWRCTL#（Pin 72）outputs logic low after PSOUT# issues a low
1： Indicates that PWRCTL# will output logic low after resum from AC power loss if
Power loss control bit <1：0>
00： System always turn off when come back from power loss state.
01： System always turn on when come back from power loss state.
10： System turn on/off when come back from power loss state depend on the state
11： Reserved.
Suspend clock source select
0： Use internal clock source.
1： Use external suspend clock source（32.768KHz）.
Keyboard wake-up type select for wake-up the system from S1/S2.
0： Password or Hot keys programmed in the registers.
1： Any key.
Enable all wake-up event set in CRE0 can wake-up the system from S1/S2 state. This
bit is cleared when wake-up event occurs.
0： Disable.
1： Enable.
Reserved.
pluse.
SLP_SX（Pin 73）is logic high.
before power loss.
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DESCRIPTION
DESCRIPTION
W83627HF/ F/ HG/ G
Publication Release Date: June 09, 2006
Revision 2.27