w83627hf-pw Winbond Electronics Corp America, w83627hf-pw Datasheet - Page 101

• Manufacturer Part Number: w83627hf-pw
• Description: W83627hf/f W83627hg/g Winbond Lpc I/o
• Manufacturer: Winbond Electronics Corp America

9.8
CR30 （Default 0x00）
CR60, CR 61 （Default 0x00, 0x00）
CR70 （Default 0x00）
9.9
CR30 （Default 0x00）
CR60, CR 61 （Default 0x02, 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise）
CR62, CR 63 （Default 0x03, 0x30 if PNPCVS = 0 during POR, default 0x00 otherwise）
These two registers select CIR I/O base address [0x100：0xFF8] on 8 byte boundary.
These two registers select the Game Port base address [0x100：0xFFF] on 1 byte boundary.
These two registers select the MIDI Port base address [0x100：0xFFF] on 2 byte boundary.
7 - 1
7 - 4
3 - 0
7 - 3
BIT
BIT
BIT
0
2
1
0
Logical Device 6 （CIR）
Logical Device 7 （Game Port, MIDI Port and GPIO Port 1）
Reserved.
These bits select IRQ resource for CIR.
Reserved
Reserved.
Logic device activation control
1： Active
0： Inactived
MIDI Port activation control
1： Enable（MIDI Port will be active individually even though CR30[0] is set “0”）
0： Disbale
Game Port activation control
1： Enable（Game Port will be active individually even though CR30[0] is set “0”）
0： Disable
Logic device activation control
1： Active
0： Inactived
- 97 -
DESCRIPTION
DESCRIPTION
DESCRIPTION
W83627HF/ F/ HG/ G
Publication Release Date: June 09, 2006
Revision 2.27