sta381bws STMicroelectronics, sta381bws Datasheet - Page 153

• Manufacturer Part Number: sta381bws
• Description: Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
• Manufacturer: STMicroelectronics

STA381BWS
7.24
The STA381BWS implements a detection on the PWM outputs able to verify if the output
signal has no zero-crossing in a configurable time window. This check can be useful to
detect DC levels in the PWM outputs. To be noted that the checks are performed on logic
level PWM (i.e. not the power bridge ones, nor the PWM on DDX3 and DDX4 I/Os).
In case of ternary modulation, the detection threshold is computed as:
If the measured PWM duty cycle, is detected greater than or equal to TH for more than
BPTIM PWM periods, the corresponding PWM bit will be set in register 0x4E.
In case of binary modulation, there are two thresholds:
In this case if the measured PWM dutycycle is outside the TH1-TH2 range for more than
BPTIM PWM periods, the corresponding bit will be set in register 0x4E.
Enhanced zero-detect mute and input level measurement
(address 0x50-0x54)
The STA381BWS implements an RMS-based zero-detect function (on serial input interface
data) able to detect in a very reliable way the presence of an input signal, so that the power
bridge outputs can be automatically connected to ground.
When active, the function will mute the output PWM when the input level become less than
“threshold-hysteresis”. Once muted, the PWM will be unmuted when the input level is
detected greater than “threshold+hysteresis”.
reserved
N/A
N/A
N/A
N/A
D7
D7
D7
D7
D7
0
TH=[(BPTH*2+1)/128]*100%
TH1=[(64+BPTH)/128]*100%
TH2=[(64-BPTH)/128]*100%
reserved
N/A
N/A
N/A
N/A
D6
D6
D6
D6
D6
0
reserved
N/A
N/A
N/A
N/A
D5
D5
D5
D5
D5
0
Doc ID 018937 Rev 2
Register description: Sound Terminal compatibility
N/A
N/A
N/A
N/A
D4
D4
D4
D4
D4
0
RMS_CH0[15:8]
RMS_CH1[15:8]
RMS_CH0[7:0]
RMS_CH1[7:0]
HSEL[1:0]
N/A
N/A
N/A
N/A
D3
D3
D3
D3
D3
0
N/A
N/A
N/A
N/A
D2
D2
D2
D2
D2
1
ZMTH[2:0]
N/A
N/A
N/A
N/A
D1
D1
D1
D1
D1
1
153/168
N/A
N/A
N/A
N/A
D0
D0
D0
D0
D0
1