st802rt1a STMicroelectronics, st802rt1a Datasheet - Page 46

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st802rt1a

Manufacturer Part Number
st802rt1a
Description
10/100 Real-time Ethernet 3.3 V Transceiver
Manufacturer
STMicroelectronics
Datasheet

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Device operation
Table 32.
Figure 8.
7.20
46/58
PECL
PECL
PECL
Voltage>0.6
PECL
HIGH
LOW
LOW
Ground
Ground
SDn
These two signals can be either driven by standard CMOS levels or by PECL levels. The
data coming from the optical transceiver are PECL signals and need to be converted to
CMOS level before being delivered to the data and clock recovery and then to the serial-to-
parallel interface to be transmitted to the digital portion.
Configuration of signal detect voltage levels
PECL levels
PECL transmitter
This circuit is designed to acquire the data coming from the parallel-to-serial interface and
NRZ-to-NRZI converter, and to transmit it to the optical transceiver. In this case, the data is
received by the transmitter in a CMOS format and is transmitted to the optical portion in a
PECL format. See
(PECL
(PECL
(PECL
HIGH
MID
MID
MID
)
)
)
Positive voltage
Figure 8
Voltage>0.6
PECL
PECL
PECL
PECL
Ground
SDp
HIGH
HIGH
LOW
LOW
for the definition of PECL levels.
Doc ID 17049 Rev 1
TX mode
Undefined state
Undefined state
FX mode asserted, but no data valid on the line
FX mode asserted, but no data valid on the line
Undefined state
FX mode asserted, link OK and data valid
Mode
ST802RT1A, ST802RT1B

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