tda19977a NXP Semiconductors, tda19977a Datasheet - Page 17

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tda19977a

Manufacturer Part Number
tda19977a
Description
Triple Input Hdmi 1.3a Compliant Receiver Interface With Equalizer Up To 1080p For Hdtv, And Uxga For Pc Formats
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
9. I
10. Limiting values
TDA19977A_TDA19977B_1
Product data sheet
2
C-bus protocol
8.25.2 EDID memory shared over two HDMI inputs
The TDA19977A; TDA19977B is a slave I
pin. The timing and protocol for I
Bit A0 of the I
I
Table 7.
Table 8.
In accordance with the Absolute Maximum Rating System (IEC 60134).
A6
1
Symbol
V
V
I
T
2
O
Fig 4.
C-bus address is given in
V
stg
DDx(3V3)
DDx(1V8)
DD
(1) 253 bytes
+ 3 bytes input B
+ 3 bytes input C
+ 1 byte address pointer (subPhys@): this indicates the address in each block where the data for
inputs B and C will be copied.
An example of an application with EDID memory shared over two HDMI inputs
I
Limiting values
2
A5
0
C-bus slave address
Parameter
supply voltage on all 3.3 V
pins
supply voltage on all 1.8 V
pins
supply voltage difference
output current
storage temperature
2
EXTERNAL EDID:
C-bus device address is externally selected by the A0 pin. The main device
256 B or 512 B
A4
0
Rev. 01 — 7 August 2008
Triple input HDMI receiver interface with digital processing
Table
INPUT
DVI or
HDMI
2
C-bus are standard.
7.
A3
1
TDA19977A; TDA19977B
EDID: 253 B
TDA19977
INPUT
HDMI
Conditions
3 B
2
C-bus device and the SCL pin is only an input
A2
1
INPUT
HDMI
3 B
I
2
C-bus
A1
0
EDID CONTENT
Min
-
0.5
0.5
0.5
55
FLASH
CPU
A0
A0
001aai384
(1)
© NXP B.V. 2008. All rights reserved.
Max
+4.6
+2.5
+0.5
35
+150
R/W
0/1
Unit
V
V
V
mA
C
17 of 40

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