uja1075a NXP Semiconductors, uja1075a Datasheet - Page 27

• Manufacturer Part Number: uja1075a
• Description: High-speed Can/lin Core System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
UJA1075A
Product data sheet
6.10 Interrupt output
6.11 Temperature protection
Pin INTN is an active-LOW, open-drain interrupt output. It is driven LOW when at least
one interrupt is pending. An interrupt can be cleared by writing 1 to the corresponding bit
in the Int_Status register
clears the interrupt status bits and not the pending wake-up. The pending wake-up is
cleared on entering Normal mode and when the corresponding standby control bit
(STBCC or STBCL) is 0.
On devices that contain a watchdog, the CI is enabled when the watchdog switches to
Timeout mode while the SBC is in Standby mode or Normal mode (provided pin
WDOFF = LOW). A CI is generated if the watchdog overflows in Timeout mode.
The CI is provided to alert the microcontroller when the watchdog overflows in Timeout
mode. The CI will wake up the microcontroller from a μC standby mode. After polling the
Int_Status register, the microcontroller will be aware that the application is in cyclic wake
up mode. It can then perform some checks on CAN and LIN before returning to the μC
standby mode.
The temperature of the SBC chip is monitored in Normal and Standby modes. If the
temperature is too high, the SBC will go to Overtemp mode, where the RSTN pin is driven
LOW and limp home is activated. In addition, the voltage regulators and the CAN and LIN
transmitters are switched off (see also
temperature falls below the temperature shutdown threshold, the SBC will go to Standby
mode. The temperature shutdown threshold is between 165 °C and 200 °C.
Fig 12. Typical application for cyclic sampling of wake-up signals
UJA1075A
GND
All information provided in this document is subject to legal disclaimers.
BAT
WBIAS
WAKE1
WAKE2
Rev. 01 — 9 July 2010
(Table
47 kΩ
47 kΩ
7). Clearing bits LWI and CWI in Standby mode only
Section 6.1.6 “Overtemp
High-speed CAN/LIN core system basis chip
PDTA144E
biasing of
switches
sample of
WAKEx
mode”). When the
sample of
WAKEx
UJA1075A
© NXP B.V. 2010. All rights reserved.
sample of
WAKEx
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