peb20550 Infineon Technologies Corporation, peb20550 Datasheet - Page 3
peb20550
Manufacturer Part Number
peb20550
Description
Extended Pcm Interface Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20550.pdf
(269 pages)
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Table of Contents
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.7.1
1.7.1.1 Switching, Layer-1 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
1.7.1.2 Decentralized D-Channel Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
1.7.1.3 Central D-Channel Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
1.7.1.4 Mixed D-Channel Processing, Signaling Decentralized,
1.7.2
1.7.3
2
2.1
2.2
2.3
2.4
2.5
2.6
3
3.1
3.2
3.3
3.4
3.4.1
3.4.2
3.4.3
3.4.4
3.5
3.5.1
3.5.2
3.5.2.1 Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
3.5.2.2 Control Memory Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
3.5.2.3 Initialization of Pre-processed Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
3.5.2.4 Initialization of the Upstream Data Memory (DM) Tristate Field . . . . . . . . . .45
3.5.3
Semiconductor Group
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Logic Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Using the EPIC-S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
System Integration and Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Digital Line Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Packet Data Centralized
Analog Line Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Packet Handlers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Configurable Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Memory Structure and Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Pre-processed Channels, Layer-1 Support . . . . . . . . . . . . . . . . . . . . . . . . . .31
Special Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Microprocessor Interface Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
EPIC
PCM-Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Configurable Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Switching Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Special Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Initialization Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
EPIC
Activation of the PCM and CFI Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . .45
®
®
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
3
PEB 2055
PEF 2055
02.97
Page
21
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