isp1704a NXP Semiconductors, isp1704a Datasheet - Page 65

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isp1704a

Manufacturer Part Number
isp1704a
Description
Ulpi Hi-speed Usb Transceiver
Manufacturer
NXP Semiconductors
Datasheet

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25. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Interface behavior when exiting UART mode . . . .26
Fig 11. Rise time and fall time . . . . . . . . . . . . . . . . . . . . .49
Fig 12. Timing of TX_DAT and TX_SE0 to DP and DM . .49
Fig 13. Timing of TX_ENABLE to DP and DM. . . . . . . . .49
Fig 14. Timing of DP and DM to RX_RCV, RX_DP
Fig 15. ULPI timing interface . . . . . . . . . . . . . . . . . . . . . .50
Fig 16. Charger detection . . . . . . . . . . . . . . . . . . . . . . . .51
Fig 17. Using the ISP1704A with a standard USB
Fig 18. Using the ISP1704A with a standard USB
Fig 19. Using the ISP1704A with a USB OTG
Fig 20. Package outline SOT912-1 (TFBGA36). . . . . . . .56
Fig 21. Temperature profiles for large and small
ISP1704A_1
Product data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . .5
Digital overcurrent detection scheme. . . . . . . . . .11
Internal power-on reset timing . . . . . . . . . . . . . . .12
Power-up and reset sequence required
before the ULPI bus is ready for use . . . . . . . . . .13
Interface behavior with respect to chip select . . .14
V
Charger detection setup. . . . . . . . . . . . . . . . . . . .20
Interface behavior when entering UART mode . .26
and RX_DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
peripheral controller . . . . . . . . . . . . . . . . . . . . . . .53
host controller . . . . . . . . . . . . . . . . . . . . . . . . . . .54
controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59
BUS
pin internal pull-up and pull-down scheme .16
Rev. 01 — 28 July 2008
ULPI HS USB transceiver
ISP1704A
© NXP B.V. 2008. All rights reserved.
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