isp1562 NXP Semiconductors, isp1562 Datasheet - Page 69

• Manufacturer Part Number: isp1562
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
[1]
Table 105. ASYNCLISTADDR - Current Asynchronous List Address register bit description
Address: Content of the base address register + 38h
Table 106. CONFIGFLAG - Configure Flag register bit allocation
Address: Content of the base address register + 60h
[1]
ISP1562_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 5
4 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
The reserved bits should always be written with the reset value.
Symbol
LPL[26:0]
reserved
11.3.7 CONFIGFLAG register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
23
15
31
23
15
0
0
7
0
0
0
0
7
0
Description
Link Pointer List: These bits correspond to memory address signals 31 to 5, respectively. This field
may only reference a Queue Head (QH).
-
The bit allocation of the Configure Flag (CONFIGFLAG) register is given in
LPL[2:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
22
14
30
22
14
0
0
6
0
0
0
0
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
21
13
29
21
13
0
0
5
0
0
0
0
5
0
Rev. 02 — 1 March 2007
reserved
R/W
R/W
R/W
R/W
R/W
R/W
R/W
20
12
28
20
12
0
0
4
0
0
0
0
4
0
LPL[18:11]
reserved
reserved
reserved
LPL[10:3]
[1]
[1]
[1]
[1]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
19
11
27
19
11
0
0
3
0
0
0
0
3
0
reserved
R/W
R/W
R/W
R/W
R/W
R/W
R/W
18
10
26
18
10
0
0
2
0
0
0
0
2
0
HS USB PCI Host Controller
[1]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
17
25
17
0
9
0
1
0
0
0
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1562
Table
R/W
R/W
R/W
R/W
R/W
R/W
R/W
106.
CF
16
24
16
0
8
0
0
0
0
0
8
0
0
0
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